VLSI System Design

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“vsdsquadron”: Empowering Learners with Open-Source Technology and VLSI/RISC-V Skills. We’re supporting a community where more than millions of people learn, share, and work together to build a chip. At VSD, where we always promote “open source,” we’re promoting about a proven method of collaborating to create technology. The freedom to see the design, to learn from it, to ask questions and offer improvements: This is the open source way. VSD partners with open source developers in hardware domain to build the vsdflow that will provide platform to community for designing a chip at $0.Open source developers partner with VSD for our approach to build content centric, research oriented flow to build a design and community. Practice Areas: RTL design, Synthesis and Verification SoC planning and Design Sign-off analysis IP Design CAD/EDA automation and basic UNIX/IT RISC-V, Machine intelligence in

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Chip Design for High School — Learn Using a Real Hardware Trainer Kit

Chip Design for High School — Learn Using a Real Hardware Trainer Kit VLSI System Design

181 views - 3 months ago

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar, Synopsys and VSD_Kannada

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar, Synopsys and VSD_Kannada VLSI System Design

428 views - 9 months ago

VSDSquadron Ultra board, Powered by CDAC used for Electrical Vehicle App (Battery Management System)

VSDSquadron Ultra board, Powered by CDAC used for Electrical Vehicle App (Battery Management System) VLSI System Design

233 views - 10 months ago

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar,Synopsys and VSD_Gujarati

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar,Synopsys and VSD_Gujarati VLSI System Design

333 views - 10 months ago

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar, Synopsys and VSD(Marathi)

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar, Synopsys and VSD(Marathi) VLSI System Design

256 views - 10 months ago

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar, Synopsys and VSD Hindi

RISC‑V Reference SoC Tapeout Program : IIT Gandhinagar, Synopsys and VSD Hindi VLSI System Design

800 views - 10 months ago

Designing a Single-Cycle RISC-V (RV32IM) on VSDSquadronFM

Designing a Single-Cycle RISC-V (RV32IM) on VSDSquadronFM VLSI System Design

719 views - 10 months ago

Warehouse automation using VSDSquadron mini RISC-V boards

Warehouse automation using VSDSquadron mini RISC-V boards VLSI System Design

258 views - 1 year ago

ELCIA, IIIT Bangalore, and VSD Unite for Innovation: Pioneering Solutions at the 2024 Hackathon

ELCIA, IIIT Bangalore, and VSD Unite for Innovation: Pioneering Solutions at the 2024 Hackathon VLSI System Design

192 views - 1 year ago

VSD Team interview taken by DD News at SEMICON India 2024

VSD Team interview taken by DD News at SEMICON India 2024 VLSI System Design

1.9K views - 1 year ago

VSDSquadron Mini Application - Object Detector Using Ultrasonic Sensor

VSDSquadron Mini Application - Object Detector Using Ultrasonic Sensor VLSI System Design

457 views - 2 years ago

VSDSquadron Mini Application - Implementing 2-bit Array Multiplier

VSDSquadron Mini Application - Implementing 2-bit Array Multiplier VLSI System Design

429 views - 2 years ago

VSDSquadron Mini Application - Implementing Moisture Sensor

VSDSquadron Mini Application - Implementing Moisture Sensor VLSI System Design

261 views - 2 years ago

VSDSquadron - One Chip, One Board, One lab, One Course - Free Shipping and Lifetime Access

VSDSquadron - One Chip, One Board, One lab, One Course - Free Shipping and Lifetime Access VLSI System Design

181 views - 2 years ago

VSDSquadron RISC-V Embedded Design Educational Development Boards

VSDSquadron RISC-V Embedded Design Educational Development Boards VLSI System Design

292 views - 2 years ago

Chip Design for High School by VSD

Chip Design for High School by VSD VLSI System Design

1.4K views - 2 years ago

VLSI System Design- Open to Innovate !!

VLSI System Design- Open to Innovate !! VLSI System Design

1.2K views - 2 years ago

VSD Journey from Chip Design to Product

VSD Journey from Chip Design to Product VLSI System Design

1K views - 3 years ago

OpenFASoC And ALIGN For Chip Core Generation

OpenFASoC And ALIGN For Chip Core Generation VLSI System Design

878 views - 3 years ago

"VSDSquadron" RISC-V development board to learn RISC-V architecture & Chip Design using Open Source

"VSDSquadron" RISC-V development board to learn RISC-V architecture & Chip Design using Open Source VLSI System Design

622 views - 3 years ago

ALIGN Open-Source Tool for Analog Circuit Layout Synthesis: Hands-on Lab-based Training Webinar

ALIGN Open-Source Tool for Analog Circuit Layout Synthesis: Hands-on Lab-based Training Webinar VLSI System Design

2.4K views - 3 years ago

VSD Hardware Design Program details

VSD Hardware Design Program details VLSI System Design

769 views - 3 years ago

VSDOpen 2022 Online Conference

VSDOpen 2022 Online Conference VLSI System Design

802 views - 3 years ago

VSDOpen 2022 Online Conference(In Collaboration with Google)

VSDOpen 2022 Online Conference(In Collaboration with Google) VLSI System Design

159 views - 3 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IITB, VSD&RedwoodEDA(Marathi)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IITB, VSD&RedwoodEDA(Marathi) VLSI System Design

880 views - 4 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD&RedwoodEDA(English)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD&RedwoodEDA(English) VLSI System Design

1.3K views - 4 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD&RedwoodEDA(Gujarati)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD&RedwoodEDA(Gujarati) VLSI System Design

349 views - 4 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD & RedwoodEDA(Hindi)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD & RedwoodEDA(Hindi) VLSI System Design

445 views - 4 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD & RedwoodEDA(Telugu)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD & RedwoodEDA(Telugu) VLSI System Design

347 views - 4 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD & RedwoodEDA(Kanada)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD & RedwoodEDA(Kanada) VLSI System Design

273 views - 4 years ago

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD and RedwoodEDA(Beng)

Mixed Signal Circuit Design & Simulation Marathon using eSim FOSSEE, IIT B, VSD and RedwoodEDA(Beng) VLSI System Design

1.4K views - 4 years ago

VSDOpen 2021 VLSI System Design

718 views - 4 years ago

VSD - Mixed-signal RISC-V based SoC on FPGA.

VSD - Mixed-signal RISC-V based SoC on FPGA. VLSI System Design

1K views - 4 years ago

VSD-HDP VLSI System Design

324 views - 5 years ago

VSD Intern - 10-bit DAC design using eSim and Sky130

VSD Intern - 10-bit DAC design using eSim and Sky130 VLSI System Design

1.6K views - 5 years ago

Non-VLSI VLSI System Design

1.6K views - 5 years ago

RISC-V MYTH Workshop Promo video - 3

RISC-V MYTH Workshop Promo video - 3 VLSI System Design

357 views - 5 years ago

RISC-V MYTH Workshop Promo video - 2

RISC-V MYTH Workshop Promo video - 2 VLSI System Design

565 views - 5 years ago

RISC-V MYTH Workshop Promo video - 1

RISC-V MYTH Workshop Promo video - 1 VLSI System Design

1.8K views - 5 years ago

10Bit DAC using Sky130 Part 3 - LIVE Layout Design using Sky130 PDKs

10Bit DAC using Sky130 Part 3 - LIVE Layout Design using Sky130 PDKs VLSI System Design

824 views - 5 years ago

10 Bit DAC using Sky130 Part 2 - LIVE Circuit Design using Xschem

10 Bit DAC using Sky130 Part 2 - LIVE Circuit Design using Xschem VLSI System Design

1.3K views - 5 years ago

VSD - 10 Bit DAC using Sky130 Part 1 - Overview and project implementation flow

VSD - 10 Bit DAC using Sky130 Part 1 - Overview and project implementation flow VLSI System Design

1.2K views - 5 years ago

VSD Intern - Analog Comparator Design using Sky130

VSD Intern - Analog Comparator Design using Sky130 VLSI System Design

1.4K views - 5 years ago

General Purpose Bandgap Reference Circuit - avsdbgp_3v3_sky130

General Purpose Bandgap Reference Circuit - avsdbgp_3v3_sky130 VLSI System Design

1.4K views - 5 years ago

VSD Intern – Mixed Signal Physical Design Flow with Sky130

VSD Intern – Mixed Signal Physical Design Flow with Sky130 VLSI System Design

1.5K views - 5 years ago

VSD Intern - OpenRAM configuration for 4kB SRAM using Sky130

VSD Intern - OpenRAM configuration for 4kB SRAM using Sky130 VLSI System Design

2.5K views - 5 years ago

VSDOpen2020 VLSI System Design

376 views - 5 years ago

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD – Intelligent Assessment Technology (VSD-IAT) VLSI System Design

741 views - 5 years ago

VSD – Intelligent Assessment Technology (VSD – IAT)

VSD – Intelligent Assessment Technology (VSD – IAT) VLSI System Design

5.4K views - 6 years ago

VSDOpen 2019 Online Conference!!

VSDOpen 2019 Online Conference!! VLSI System Design

1.6K views - 6 years ago

VSD - Embedded-UVM - Opensource Verification and Emulation

VSD - Embedded-UVM - Opensource Verification and Emulation VLSI System Design

1.2K views - 7 years ago

VSDOpen2018 - First ever online VLSI conference - Promo Video

VSDOpen2018 - First ever online VLSI conference - Promo Video VLSI System Design

1.7K views - 7 years ago

L16 Steps To Jump To Subroutine And Return To Main Program Using auipc And jalr

L16 Steps To Jump To Subroutine And Return To Main Program Using auipc And jalr VLSI System Design

1.6K views - 7 years ago

Library characterization and modelling in 1min

Library characterization and modelling in 1min VLSI System Design

2.6K views - 7 years ago

Promo video of Webinar on "SoC Reference Design of the PicoRV32 RISC-V Microprocessor"

Promo video of Webinar on "SoC Reference Design of the PicoRV32 RISC-V Microprocessor" VLSI System Design

832 views - 8 years ago

Distributed STA webinar - Promo video

Distributed STA webinar - Promo video VLSI System Design

240 views - 8 years ago

Promo - RTL Synthesis Q&A Webinar - With Clifford Wolf & Kunal Ghosh

Promo - RTL Synthesis Q&A Webinar - With Clifford Wolf & Kunal Ghosh VLSI System Design

482 views - 8 years ago

Semicon China 2018 - LIVE talk on vsdflow - An EDA Management System

Semicon China 2018 - LIVE talk on vsdflow - An EDA Management System VLSI System Design

2.6K views - 8 years ago

Library characterization and modelling - Part 2

Library characterization and modelling - Part 2 VLSI System Design

3.8K views - 8 years ago

Machine Intelligence in EDA/CAD - Webinar Promo Video

Machine Intelligence in EDA/CAD - Webinar Promo Video VLSI System Design

1.3K views - 8 years ago