Dom

@UCa-PtRGtejpYHm1ntMDi2FQ - 3.4K subscribers

A renewable energy engineering student at Oregon Institute of Technology! Also I love FPGAs!!

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IIR Filters on FPGAs Part 3: Cascading Biquads (Higher Order Filters)

IIR Filters on FPGAs Part 3: Cascading Biquads (Higher Order Filters) Dom

623 views - 1 year ago

IIR Filters on FPGAs Part 2: AXI-Stream Biquad

IIR Filters on FPGAs Part 2: AXI-Stream Biquad Dom

906 views - 1 year ago

IIR Filters on FPGAs Part 1: A Simple IIR Filter

IIR Filters on FPGAs Part 1: A Simple IIR Filter Dom

3.4K views - 1 year ago

Microblaze and UART Lite on the ARTY S7 | Vivado + Vitits

Microblaze and UART Lite on the ARTY S7 | Vivado + Vitits Dom

24.4K views - 4 years ago

VGA image driver (make a face) on an Intel FPGA

VGA image driver (make a face) on an Intel FPGA Dom

13.9K views - 5 years ago

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 4: Implementation

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 4: Implementation Dom

2.9K views - 5 years ago

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 3: Simulation

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 3: Simulation Dom

3.3K views - 5 years ago

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 2: Code

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 2: Code Dom

2K views - 5 years ago

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 1: FSM

Xilinx FPGA Projects With Vivado: Button/Keypad Sequence | Part 1: FSM Dom

3.1K views - 5 years ago

HDMI FPGA | FGPA4fun code updated to Vivado 2020.1

HDMI FPGA | FGPA4fun code updated to Vivado 2020.1 Dom

10.3K views - 5 years ago

Energy Density Spectrum | DTFT of Energy and Power Signals

Energy Density Spectrum | DTFT of Energy and Power Signals Dom

1.5K views - 5 years ago

IDTFT(Inverse Discrete Time Fourier Transform) of 1

IDTFT(Inverse Discrete Time Fourier Transform) of 1 Dom

4.1K views - 5 years ago

DTFT (discrete time fourier transform) of Delta function

DTFT (discrete time fourier transform) of Delta function Dom

6.3K views - 5 years ago

ZYNQ for beginners: programming and connecting the PS and PL | Part 2

ZYNQ for beginners: programming and connecting the PS and PL | Part 2 Dom

72.4K views - 5 years ago

ZYNQ for beginners: programming and connecting the PS and PL | Part 1

ZYNQ for beginners: programming and connecting the PS and PL | Part 1 Dom

161.4K views - 5 years ago

SPI FPGA core for MCP3202 ADC in Verilog

SPI FPGA core for MCP3202 ADC in Verilog Dom

6.4K views - 6 years ago

SPWM single phase motor control with FPGA

SPWM single phase motor control with FPGA Dom

470 views - 6 years ago

Nate Diaz - Highest in the room

Nate Diaz - Highest in the room Dom

1.3K views - 6 years ago

How to Program QSPI Flash on ZYNQ | Hardware (HDL) Only

How to Program QSPI Flash on ZYNQ | Hardware (HDL) Only Dom

16.7K views - 6 years ago

Switch level modeling with Verilog

Switch level modeling with Verilog Dom

1.8K views - 6 years ago

First Project with Lattice FPGA- Part 6: Hardware Implementation

First Project with Lattice FPGA- Part 6: Hardware Implementation Dom

3.4K views - 6 years ago

First Project with Lattice FPGA- Part 5: Programming

First Project with Lattice FPGA- Part 5: Programming Dom

10.5K views - 6 years ago

First Project With Lattice FPGA - Part 4: Simulation

First Project With Lattice FPGA - Part 4: Simulation Dom

11.2K views - 6 years ago

First Project With Lattice FPGA - Part 3: Verilog

First Project With Lattice FPGA - Part 3: Verilog Dom

8.7K views - 6 years ago

First Project With Lattice FPGA - Part 2: Software Tools

First Project With Lattice FPGA - Part 2: Software Tools Dom

8K views - 6 years ago

First Project with Lattice FPGA - Part 1: Intro

First Project with Lattice FPGA - Part 1: Intro Dom

13.2K views - 6 years ago