Karthik Vippala

@UCkeVvMfGZZCobuaTDp62PMw - 16.1K subscribers

Micro Architecture | Verilog | SystemVerilog | Synthesis | Static Timing Analysis | DFT Sorry, I’m not into PD... yet 😅 👋 Hey there! I'm Karthik Vippala — an ASIC Design Engineer and educator. This channel is your go-to space for everything from electronics fundamentals to advanced chip design, explained simply, visually, and with a touch of fun. I started this channel because I struggled to find reliable explanations while learning and preparing for interviews. So I built the kind of resource I wish I had — grounded, structured, and made for curious minds like yours. 💬 Drop your questions in the comments — I respond within 24 hours. 🧠 Learn at your pace. Think in logic. Build with confidence. 📌 Subscribe to stay ahead in your chip design journey. ありがとう (Arigatou) — thank you for being here! 😊

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Operations in sensitivity lists !! always @(a && b) .....

Operations in sensitivity lists !! always @(a && b) ..... Karthik Vippala

1.7K views - 2 years ago

Fixded Priority Arbitration | Efficient way to CODE RTL #2 #vlsi

Fixded Priority Arbitration | Efficient way to CODE RTL #2 #vlsi Karthik Vippala

3.8K views - 3 years ago

What is the difference between 1 and 1'b1 in Verilog ? || Concatenation Problems { }

What is the difference between 1 and 1'b1 in Verilog ? || Concatenation Problems { } Karthik Vippala

2.8K views - 3 years ago

What is Reverse Case Statement in Verilog? Case(1'b1)

What is Reverse Case Statement in Verilog? Case(1'b1) Karthik Vippala

7.2K views - 3 years ago

Strict Priority Arbitration (Design, Testbench, Assertions) CODERTL#1

Strict Priority Arbitration (Design, Testbench, Assertions) CODERTL#1 Karthik Vippala

2.8K views - 3 years ago

X-propagation in SOC design flow | Do you Love your X !!

X-propagation in SOC design flow | Do you Love your X !! Karthik Vippala

8.5K views - 4 years ago

A Google Interview Question. # Digital Design

A Google Interview Question. # Digital Design Karthik Vippala

8.5K views - 4 years ago

How to design Clock Divided By 4.5 ? Explained!

How to design Clock Divided By 4.5 ? Explained! Karthik Vippala

18K views - 4 years ago

Downloading & Installation of Intel Quartus Prime & ModelSim [2022]

Downloading & Installation of Intel Quartus Prime & ModelSim [2022] Karthik Vippala

22K views - 4 years ago

How to swap data of registers using Logic gates? 🤔Brain Teaser #3

How to swap data of registers using Logic gates? 🤔Brain Teaser #3 Karthik Vippala

2.8K views - 4 years ago

What should I learn ,to be good at physical design ? 🤔💭 | A-Z of Physical Design with Nikhil Shah.

What should I learn ,to be good at physical design ? 🤔💭 | A-Z of Physical Design with Nikhil Shah. Karthik Vippala

1.6K views - 4 years ago

In Talk With Expert : NIKHIL SHAH | Part -1 | Will AI Impact VLSI ? 🤔

In Talk With Expert : NIKHIL SHAH | Part -1 | Will AI Impact VLSI ? 🤔 Karthik Vippala

2.4K views - 4 years ago

How to count number of one's in a binary vector using adders?🤔💭 Brain Teaser#2

How to count number of one's in a binary vector using adders?🤔💭 Brain Teaser#2 Karthik Vippala

9.7K views - 4 years ago

What is Dual Edge Triggered Flip Flop? How to design it?🤔 Explained 👍

What is Dual Edge Triggered Flip Flop? How to design it?🤔 Explained 👍 Karthik Vippala

11K views - 5 years ago

This Will Change How YOU Think of Digital Design 🤔| BCD Multiplier | Brain Teaser#1

This Will Change How YOU Think of Digital Design 🤔| BCD Multiplier | Brain Teaser#1 Karthik Vippala

2.4K views - 5 years ago

How to implement Logic Gates & Boolean expression using a switches? || Switching Theory||

How to implement Logic Gates & Boolean expression using a switches? || Switching Theory|| Karthik Vippala

5K views - 5 years ago

Signal Synchronization Rules (Must Follow!!)

Signal Synchronization Rules (Must Follow!!) Karthik Vippala

13K views - 5 years ago

Icarus verilog + GTKWave installing and running | Free software for verilog HDL

Icarus verilog + GTKWave installing and running | Free software for verilog HDL Karthik Vippala

133K views - 5 years ago

Which to use , Asynchronous reset or synchronous reset ? Resets Explained || Reset synchronizer!!

Which to use , Asynchronous reset or synchronous reset ? Resets Explained || Reset synchronizer!! Karthik Vippala

33K views - 5 years ago

How to represent Decimal Number in IEEE 754 (Single Precision)? In 4 steps !! Why do we use bias ?

How to represent Decimal Number in IEEE 754 (Single Precision)? In 4 steps !! Why do we use bias ? Karthik Vippala

6.7K views - 5 years ago

11011 Sequence detector (5 bits) using Moore Overlap & Non-Overlap *Simplified*

11011 Sequence detector (5 bits) using Moore Overlap & Non-Overlap *Simplified* Karthik Vippala

33K views - 5 years ago

IMPLY Gate || what is meant by Functionally Complete? Is IMPLY Gate Functionally Complete?

IMPLY Gate || what is meant by Functionally Complete? Is IMPLY Gate Functionally Complete? Karthik Vippala

3.4K views - 5 years ago

11011 sequence detector (5bits) using Melay Overlap & Non-overlap || *simple trick*

11011 sequence detector (5bits) using Melay Overlap & Non-overlap || *simple trick* Karthik Vippala

49K views - 5 years ago

What is difference between PARAMETER and ARGUMENT ? #In2min

What is difference between PARAMETER and ARGUMENT ? #In2min Karthik Vippala

11K views - 5 years ago

One hot vs binary encoding || which one is better for FPGA/ASIC? || Explained with example

One hot vs binary encoding || which one is better for FPGA/ASIC? || Explained with example Karthik Vippala

18K views - 5 years ago

How to design self correcting Johnson's Counter? *Simplified*

How to design self correcting Johnson's Counter? *Simplified* Karthik Vippala

9.9K views - 6 years ago

What is Round Robin Arbitration ? Explained

What is Round Robin Arbitration ? Explained Karthik Vippala

13K views - 6 years ago

How to multiply signed binary number ? Using Booth's Algorithm || simplified

How to multiply signed binary number ? Using Booth's Algorithm || simplified Karthik Vippala

8.9K views - 6 years ago

Mux synchronizer (Clock domain crossing)

Mux synchronizer (Clock domain crossing) Karthik Vippala

26K views - 6 years ago

What are special number systems? Explained with examples!!

What are special number systems? Explained with examples!! Karthik Vippala

1.9K views - 6 years ago

How to draw timing diagram for D Flip flop with asynchronous inputs(Preset & Clear) ?

How to draw timing diagram for D Flip flop with asynchronous inputs(Preset & Clear) ? Karthik Vippala

20K views - 6 years ago

Handshake synchronizer (clock domain crossing)

Handshake synchronizer (clock domain crossing) Karthik Vippala

30K views - 6 years ago

What is Dual Priority Encoder?

What is Dual Priority Encoder? Karthik Vippala

6.9K views - 6 years ago

what is a storage element in electronics ? Analysis of basic latch Explained !!

what is a storage element in electronics ? Analysis of basic latch Explained !! Karthik Vippala

2K views - 6 years ago

Handshake based pulse synchronizer Explained!!

Handshake based pulse synchronizer Explained!! Karthik Vippala

24K views - 6 years ago

How to implement Barrel shifter using 2:1 mux's and 4:1 mux's ? Explained with example rotate right

How to implement Barrel shifter using 2:1 mux's and 4:1 mux's ? Explained with example rotate right Karthik Vippala

50K views - 6 years ago

Basic Shift and Rotate operations with examples for SLL,SRL ,SRA,ROL,ROR.

Basic Shift and Rotate operations with examples for SLL,SRL ,SRA,ROL,ROR. Karthik Vippala

24K views - 6 years ago

How implement binary multiplier using half adders or parallel adders?

How implement binary multiplier using half adders or parallel adders? Karthik Vippala

2.4K views - 6 years ago

What is endianness? Big Endian vs. Little Endian. What are its advantages and disadvantages?

What is endianness? Big Endian vs. Little Endian. What are its advantages and disadvantages? Karthik Vippala

1.6K views - 6 years ago

Clock divided by 3 with 75% Duty Cycle.

Clock divided by 3 with 75% Duty Cycle. Karthik Vippala

22K views - 6 years ago

Toggle synchronizer Explained!! Why 2 flop synchronizers cannot synchronize a pulse? | CDC

Toggle synchronizer Explained!! Why 2 flop synchronizers cannot synchronize a pulse? | CDC Karthik Vippala

42K views - 6 years ago

Is ROM sequential or combinational circuit ? ROM (Read Only Memory) Explained!

Is ROM sequential or combinational circuit ? ROM (Read Only Memory) Explained! Karthik Vippala

46K views - 6 years ago

Why a flip flop have setup time and hold time? Explained!

Why a flip flop have setup time and hold time? Explained! Karthik Vippala

25K views - 6 years ago

What is content addressable memory (CAM) or associative memory? How to design it ? What is TCAM?

What is content addressable memory (CAM) or associative memory? How to design it ? What is TCAM? Karthik Vippala

40K views - 6 years ago

How to draw timing diagram for D Latch and D Flip-flop?

How to draw timing diagram for D Latch and D Flip-flop? Karthik Vippala

142K views - 6 years ago

what is time borrowing (latch) ? why does latches support it?

what is time borrowing (latch) ? why does latches support it? Karthik Vippala

28K views - 6 years ago

(Packed BCD and Unpacked BCD) How to represent a number in packed BCD and Unpacked BCD?

(Packed BCD and Unpacked BCD) How to represent a number in packed BCD and Unpacked BCD? Karthik Vippala

21K views - 6 years ago

Is BCD (Binary Coded Decimal) different than binary or same ? | Comparison of BCD and binary.

Is BCD (Binary Coded Decimal) different than binary or same ? | Comparison of BCD and binary. Karthik Vippala

8.4K views - 6 years ago

What are tie cells ? Where do we use them ? Why do we use them? | Explained!!

What are tie cells ? Where do we use them ? Why do we use them? | Explained!! Karthik Vippala

4.4K views - 6 years ago

Prime Implicant & Essential Prime Implicant , Explained !

Prime Implicant & Essential Prime Implicant , Explained ! Karthik Vippala

6.8K views - 6 years ago

why Carry look ahead adder is faster than Ripple carry adder? | Carry look ahead adder Explained!!

why Carry look ahead adder is faster than Ripple carry adder? | Carry look ahead adder Explained!! Karthik Vippala

11K views - 6 years ago

How to multiply signed binary numbers? 2's complement multiplication with examples | simplified .

How to multiply signed binary numbers? 2's complement multiplication with examples | simplified . Karthik Vippala

87K views - 6 years ago

What is priority encoder ? How it solves limitations of encoder? | Explained with example.

What is priority encoder ? How it solves limitations of encoder? | Explained with example. Karthik Vippala

3.2K views - 6 years ago

What is an encoder? What are it's advantages and limitations? why do we need priority encoder?

What is an encoder? What are it's advantages and limitations? why do we need priority encoder? Karthik Vippala

2.3K views - 6 years ago

How to implement a Boolean expression using universal gate?

How to implement a Boolean expression using universal gate? Karthik Vippala

23K views - 6 years ago

How to do binary division? Explained with example | VERY EASY

How to do binary division? Explained with example | VERY EASY Karthik Vippala

629 views - 6 years ago

What is Clock skew? || Types of clock skew . Advantage and disadvantage of clock skew || Explained

What is Clock skew? || Types of clock skew . Advantage and disadvantage of clock skew || Explained Karthik Vippala

29K views - 6 years ago

CMOS logic of Full Adder (VLSI) with reduced number of transistors . Explained! | Simplified

CMOS logic of Full Adder (VLSI) with reduced number of transistors . Explained! | Simplified Karthik Vippala

18K views - 6 years ago

How to multiply Hexadecimal numbers ? Hexadecimal multiplication Explained . VERY EASY

How to multiply Hexadecimal numbers ? Hexadecimal multiplication Explained . VERY EASY Karthik Vippala

1.9K views - 6 years ago

How to add two Hexadecimal numbers ? Hexadecimal addition explained with examples.

How to add two Hexadecimal numbers ? Hexadecimal addition explained with examples. Karthik Vippala

2.1K views - 6 years ago